Analysis and design of a V-band low-noise amplifier in 90 nm CMOS for 60 GHz applications

A Low-Voltage, Low-Power, Two-Stage Amplifier for Switched-Capacitor Applications in 90 nm CMOS Process

Abstract- A novel low-voltage two-stage operational amplifier employing resistive biasing is presented. This amplifier implements neutralization and correction common mode stability in second stage while employs capacitive dc level shifter and coupling between two stages. The structure reduces the power consumption and increases output voltage swing. The compensation is performed by simple mill...

A 60-GHz Low Noise Amplifier in 0.13-μm CMOS

The low noise amplifier (LNA) serves as the first component of the radio frequency receiver system. The performance of LNA determines the sensitivity and selectivity of the receiver. In order to maximize performance the gain, noise figure and input matching of LNA needs to be optmized. This paper presents a 60GHz low noise amplifier on 0.13-μm standard CMOS technology designed using classical n...

A W-band Simultaneously Matched Power and Noise Low Noise Amplifier Using CMOS 0.13µm

A complete procedure for the design of W-band low noise amplifier in MMIC technology is presented. The design is based on a simultaneously power and noise matched technique. For implementing the method, scalable bilateral transistor model parameters should be first extracted. The model is also used for transmission line utilized in the amplifier circuit. In the presented method, input/output ma...

A CMOS Multi-band Low Noise Amplifier for WiMAX Applications

A 1.8 GHz CMOS Low-Noise Amplifier

A 1.8 GHz low-noise amplifier has been designed and fabricated in a standard 0.35 pm CMOS process. Measurement results indicate that the amplifier has a forward gain (S21) of 10.5 dB and a noise figure of 3.94 dB, while consuming 40 mW from a 2.5 V supply.